While these free versions exist, they are often of lower quality (e.g., scanned copies) and can be incomplete.
Switching Power Supply Design Optimization by Sanjaya Maniktala: A Comprehensive Guide
Accounting for high-frequency AC losses in the copper windings. Flux Density ( Bmaxcap B sub m a x end-sub
loops must be kept as small as possible. Traces carry parasitic inductance; when subjected to fast switching edges, this inductance causes voltage ringing and severe radiated EMI. While these free versions exist, they are often
and skin effect losses). Maniktala advises aiming for an equal split between core and copper losses at the worst-case operating point—a principle known as the "optimum allocation of losses." Preventing Saturation Designers must calculate the peak inductor current ( Ipeakcap I sub p e a k end-sub
Transformers and inductors are usually the black magic of SMPS. Maniktala breaks down:
) to ensure the core never saturates under worst-case transient conditions. Traces carry parasitic inductance; when subjected to fast
is the art of balancing contradictory requirements:
Ensuring adequate phase margin (typically greater than 45 degrees) and gain margin to prevent oscillation. Component Parasitics
transitions. These rapid voltage and current changes create significant radiated and conducted electrical noise. Mitigating EMI requires precise PCB layout techniques, optimized filter design, and a deep understanding of parasitic components. 3. Thermal Dissipation Maniktala breaks down: ) to ensure the core
Loops: Keep the path between the input capacitor, power switch, and freewheeling diode as physically compact as possible to minimize radiated EMI.
Instead of blindly increasing the snubber capacitor, he shows that you can optimize the transformer winding technique (sandwich winding or interleaving) to reduce leakage inductance from 5% to 1% of magnetizing inductance. He then mathematically proves that reducing leakage inductance reduces snubber loss by the square of the reduction factor. The book includes a step-by-step design example where efficiency jumps from 78% to 85% simply by rewinding the transformer properly—no change to silicon.
Understanding how Equivalent Series Resistance and Equivalent Series Inductance affect output ripple and control loop stability. MOSFET Parasitics: Evaluating gate charge ( Qgcap Q sub g